In article , Ian Molton
wrote:
On Wed, 10 Dec 2003 09:36:54 +0000 (GMT) Jim Lesurf
wrote:

DACs like the Meridian ones apply control loops to read in the data,
and then play them out under the control of a 'smoothed' local clock.
This can reduce the effects of jitter provided the input isn't too
bad.

well, there comes a point where cumulative jitter is more or less the
same as either no jitter, or (effectively) a different than expected
clock speed (with resulting loss of bits if it goes on long enough).

This all comes down to how you view what is happening - phase modulation or
frequency modulation. :-)

a 'smoothed' clock would basically be a 'super long timebase PLL' (is
that what you were getting at there?)

In effect, yes. The 'new' local clock has a frequency that only changes
(relatively) slowly. This clearly has to be limited as if it is too slow
the system will get out of step and you'll risk problems like buffer
under/over-flows or bit-skipping somewhere. Within the scope of such
problems, a longer slower clock should be better. Clever systems adapt this
to the quality of the data, but I doubt any domestic DACs go beyond the
Meridian approachs. There are various ways to skin this cat. The main doubt
is to how much effort is worthwhile as the problem may be less in practice
than magazine articles might lead us to believe.

Slainte,

Jim

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