In article , Don Pearce
wrote:
On Sat, 21 Nov 2009 17:22:06 +0000 (GMT), Jim Lesurf
wrote:
If you look back at the 700 amp design there isn't an explicit Cdom cap
shoved in at the end of the voltage gain sections. Instead I put a
snubber on the front long-tailed pair and got it to be stable with
that.
Yes, I've used that technique myself, but I've always preferred to use a
specific pole on the voltage amp. I understand what I'm doing better
that way. Was there something specific to do with the FET front end that
prompted it?
It was probably prompted by wanting to avoid leaving the voltage stages
having to current limit into a Cdom. I've never really liked that idea. My
own view is that it is just as likely to cause problems as cure them. I
know that that - and a tendency to use stabilised rails, have been popular.
But they aren't approaches I really liked. The nice thing about the snubber
is that you give the stage a defined resistive load at HF so control the
demands placed on the devices. In effect I just tailored the HF open loop
gain.
So far as I can recall this wasn't specific to using a FET pair at the
front. But it was decades ago so my memory is hazy. I think I did the same
where experimenting with BJT pairs at the front.
Also, I'm guessing that by suing the FET inputs, the usual voltage
offset you see on the output of a power amp is pretty much eliminated?
Yes. The FETs I chose were very expensive at the time as they were sold as
'instrumentation' devices specifically for very low dc offset and closely
matched parameters. Made as two FETs on one chip/substrate and then in the
same pack. Made at the time by Siliconix, although you can still buy
equivalents from other people. Still not cheap. IIRC I also had selected
ones which bumped up the price as I wanted minimal dc error even as things
warmed up, etc.
It also meant I didn't have to worry about needing any bias current though
the feedback and input dc defining resistors which can be another cause of
dc offset in BJT pairs even when matched.
That said, I also linked the drivers to the output so they could shunt
past the output devices if they weren't able to keep up with any HF. I
also though this would help to 'fill in' as a quasi-class-A stage
driving the output. Bit like current dumping.
I see you run two current sources (ok, voltage amplifiers really) in
series to bias the output stage - did you have any trouble with them
fighting each other?
Nope. They just behaved like current mirrors with doubled allowed max power
dissipation compared with one device. I wanted to use good HV devices and
decided doubling up was better than using higher-power devices than were
poorer in other ways.
I've been investigating that with an idea for a power amp that starts
with a high speed op amp, but I wasn't at all sure if it was really
kosher. Obviously the op amp could mop up any imbalance, but it just
felt a little wrong.
So far as I can recall it gave no problems.
I know Doug Self did a lot of models, etc, of various o/p arrangements.
But I found the above simply worked better even if his results
indicated otherwise. Presumably because this all depends on the
specific details of the devices, etc, etc. I also found that tiny
movements of the wiring loom altered the performance. Can't recall
anyone in a book dealing with that.
Self does talk about dressing wiring looms. His concern is induction of
spiky power line currents into input stages. I seem to remember that his
conclusion is that the + and - rail wires should always be a twisted
pair with minimal loop area, and run well away from the input stage.
I found that you had to have all the wiring in a very tight and well
defined loom. Waggling almost anything could alter the stability margin or
HF distortion performance.
IIRC I tended to dislike having large caps in the output area as it
seemed to just give problems with slew limiting. But I am trying to
recall decades ago, so I'm sure I've forgotten most of this! :-)
Using the conventional Cdom technique, slew rate limiting is easily
calculated from I = C dv/dt, which gives the necessary current for the
input pair. I never really considered it from the point of view of an
output stage.
One more thing - I see you degenerated the emitters of the PNP pair.
What was that about? Were you not just throwing away open loop gain?
That stage shouldn't really have any linearity issues to address.
Again, I can't recall for sure as it was so long ago. But I think this was
all about controlling things like the open loop behaviour, defining the
operating conditions of all the devices, symmetry, etc. In effect I wanted
a design that behaved well open loop and was stable (also in thermal
terms), gave low distortion and symmetric. Then have bags of gain to
feedback without problems.
Also, having the resistors means I could start with a current source
pulling the FET pair, then define the current levels though the following
stages up to the drivers. So in effect, control the limiting currents from
the start. The HF behaviour of that was then modified by the snubber at the
start.
I probably preferred losing gain in ways like having emitter resistors to
shoving a Cdom in at the end. Mind you, I don't think my design was as
weird as the Audiolab 8000. Wish I'd had their output devices back then,
though. :-)
In effect, I suppose it means I was mixing local and global gain control in
way that seemed best. But I can't now say why I ended up with any specific
details except that I experimented with a very large number of
permutations, layout, etc, etc, and ended up with the result shown. No
doubt I'd do thing differently now given newer devices and components. :-)
Slainte,
Jim
--
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