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Stewart Pinkerton wrote:
Risible indeed - but I wasn't joking! BTW, a PLL *reduces* the jitter problem, only a synchronous master clock can *eliminate* jitter. nah. as long as we're talking about jitter and not gross long-timebase clock frequency drifts, a good PLL will eliminate it. Clearly, you have no clue how digital audio works. Or for that matter, any system employing feedback. Show me a feedback system that can eliminate error at anything but a single non-varying input signal. The important word being eliminate, not reduce. -- Nick |
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On Thu, 22 Jan 2004 13:31:13 +0000, Nick Gorham
wrote: Show me a feedback system that can eliminate error at anything but a single non-varying input signal. The important word being eliminate, not reduce. Totally impossible, therefore unreasonable requirement - but an audio amp would be a good example of almost total elimination of error over a very wide frequency range. An error of perhaps no more than 0.001% would have to be considered pretty wonderful by any standards. d _____________________________ http://www.pearce.uk.com |
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On Thu, 22 Jan 2004 13:26:26 +0000
Kurt Hamster wrote: You really dont believe I play something other than mp3s then? CDs created from MP3s? dickhead. Once you get away from technobabble you don't have much of a vocabulary range do you? Sure I do. just very little of it applies to you. -- Spyros lair: http://www.mnementh.co.uk/ |||| Maintainer: arm26 linux Do not meddle in the affairs of Dragons, for you are tasty and good with ketchup. |
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On Thu, 22 Jan 2004 13:31:13 +0000
Nick Gorham wrote: Or for that matter, any system employing feedback. No need for that. Show me a feedback system that can eliminate error at anything but a single non-varying input signal. The important word being eliminate, not reduce. The key here is that I am talking about *jitter* and not an overall frequency drift. jitter differs in that it cant, by definition be more than a certain offset from a given bit position in the data stream. If it was, it would be an error, not jitter anymore. further, if we suppose that the jitter manifested itself as a consistent positive or negative offset (the amount doesnt matter), it would no longer be jitter, it would be frequency drift. so, If we presume the task of the PLL is to track the host clock, and that the hosts clock only drifts in frequency slowly (reasonable for any quartz oscillator) then all the PLL has to do is 'lock' bits within a certain range of the time they are actually supposed to arrive. If it can manage this, it can 're lock' the bits via a small buffer synchronised to the average frequency of the host clock, and jitter would be eliminated. Evidently it can only be eliminated to the same degree as the clock driving the PLLs is jitter 'free'. the same applies to a 'reclocker' - the output would only jitter as much or as little as the local clock in the reclocking unit does. For the 'contrived example' assume for a moment that there is no PLL and that the source and 'dac' clocks are in phase and running at the exact same frequency. you could do 100% elimination of jitter from the host (source) clock in such a case simply by buffering the data and re-synchronising it with the 'dac' clock. in a 'real' dac the only difference is that the host clocks frequencty may drift and so the PLL must recover the host clock well enough that the dac clock can synchronise well enough that the buffers neither over- or under- run. if the PLL is competant, then jitter will be eliminated. If you want to argue that this doesnt eliminate frequency drift in the host clock, feel free, but then I never claimed it did. -- Spyros lair: http://www.mnementh.co.uk/ |||| Maintainer: arm26 linux Do not meddle in the affairs of Dragons, for you are tasty and good with ketchup. |
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On Thu, 22 Jan 2004 14:18:24 +0000
Kurt Hamster wrote: Sure I do. just very little of it applies to you. Ahh, so your range is more limited than I had expected then. Only the bad stuff. It also looks like your capitalisation and/or punctuation needs a little work too. Why take the effort when Im talking to a cretin from beneath a rock? -- Spyros lair: http://www.mnementh.co.uk/ |||| Maintainer: arm26 linux Do not meddle in the affairs of Dragons, for you are tasty and good with ketchup. |
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On Thu, 22 Jan 2004 09:02:09 +0000, Ian Molton wrote:
On Thu, 22 Jan 2004 08:08:10 +0000 (UTC) (Stewart Pinkerton) wrote: BTW, a PLL *reduces* the jitter problem, only a synchronous master clock can *eliminate* jitter. nah. as long as we're talking about jitter and not gross long-timebase clock frequency drifts, a good PLL will eliminate it. Clearly, you have no clue how digital audio works. Yeah, ok. whatever Perhaps you would like to explain how a system with a good PLL will be affected by jitter? Simple, really. Jitter in the incoming data stream will not be attenuated at all below the bandwidth of the PLL, and will be attenuated at -6dB/octave above the bandwidth of the PLL. Hence, if the PLL has a bandwidth of say 100Hz (for easy lock-in), there will be no attenuation whatever of mains-related jitter, virtually no attenuation of PSU-related jitter, and only 20dB attenuation of 1kHz jitter. Some top-quality DACs such as the old Audiolab used twin PLLs, the second having a bandwidth of just 1 or 2 Hz, but this second lock only engaged with transports having clocks very close to the nominal 44.1k data rate (within 50ppm IIRC). -- Stewart Pinkerton | Music is Art - Audio is Engineering |
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On Thu, 22 Jan 2004 09:08:24 +0000, Ian Molton wrote:
On Thu, 22 Jan 2004 08:09:55 +0000 (UTC) (Stewart Pinkerton) wrote: That uses a synchronous master clock after the sample rate conversion. OK, that was a bit of a dodge, you're quite right that a well-implemented sample-rate converter can indeed eliminate jitter. Although its a total waste of money because any decent DAC will eliminate jitter. No, it won't. Your previous posts demonstrated that you have absolutely no idea how PLLs (or any other servo system) react to rapid fluctuations, e.g. jitter. There is only one use for reclocking, and thats if you require a synchronous output for things like mixing / recording. if you only want playback, the DAC is enough, as you wont need a synchronous output. You completely misunderstand the criticality of a low phase-noise clock at the point of D/A conversion. -- Stewart Pinkerton | Music is Art - Audio is Engineering |
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On Thu, 22 Jan 2004 17:37:57 +0000 (UTC)
(Stewart Pinkerton) wrote: Hence, if the PLL has a bandwidth of say 100Hz (for easy lock-in), there will be no attenuation whatever of mains-related jitter, virtually no attenuation of PSU-related jitter, and only 20dB attenuation of 1kHz jitter. Some top-quality DACs such as the old Audiolab used twin PLLs, the second having a bandwidth of just 1 or 2 Hz, but this second lock only engaged with transports having clocks very close to the nominal 44.1k data rate (within 50ppm IIRC). be that as it may, a PLL with a long enough timebase will recover a clock that is both jitter free and (on average) the same frequency as the host clock, over any reasonable period. The whole thing about jitter is that it averages out, over any significant period to nothing. If it didnt, you'd have a frequency drift, which is a different thing entirely. Hence as long as your PLL has a long enough timebase, jitter is an irrelevance. -- Spyros lair: http://www.mnementh.co.uk/ |||| Maintainer: arm26 linux Do not meddle in the affairs of Dragons, for you are tasty and good with ketchup. |
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On Thu, 22 Jan 2004 09:06:30 +0000, Ian Molton wrote:
On Thu, 22 Jan 2004 08:13:02 +0000 (UTC) (Stewart Pinkerton) wrote: pointless, as without MASSIVE buffers its not possible to do without errors or aliasing. Rubbish. If you want to reclock without a backchannel, you need large buffers on your device such that it is capable of buffering all data that arrives if the data rate is higher than the reclocking clock. conversely, if the transmitting clock is too slow you need to wait until the buffer has enough data not to drain before the end of the listening session. If you dont you *will* get buffer overruns and underruns. This is pretty ****ing basic stuff. Indeed it is, and the tolerance of digital audio clocks, combined with the maximum length of CDs, is such that you only a need a relatively small buffer to avoid under or overruns. better to use a PLL as any quartz clock will give adequate frequency stability within the few-kilohertz range used in audio. with a PLL jitter is irrelevant (with a good design) and you end up with the DAC locked to an adequately stable clock anyway, without the issues involved in reclocking. Absolute ********! The quartz clock isn't the issue - the bandwidth of the PLL is........ No, the long term frequency stability of the hosts clock is what determins the stability of the PLL output. the purpose of the PLL is twofold, to help reconstruct the SP/DIF clock, and to eliminate jitter. You just have *no* idea about jitter, do you? the PLL bandwidth is relevant to jitter elimination, but the whole point of a PLL is that long-term it tracks the host clock. So what? That has *nothing* to do with short-term errors, aka jitter. There are uses for reclocking system (ie. mixing and production uses) but playback isnt one of them. Sure it is. Clearly, you have no clue how digital audio works. I think that would be *you* not me. Yeah right, your posts are pretty clear on that issue............ -- Stewart Pinkerton | Music is Art - Audio is Engineering |
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